1. Technical Field
This invention relates to data processing and, in particular, data processing involving parallel information architectures.
2. Art Background
Recently, the neural network design of devices suitable for information processing has been reported. (See Procceedings of the National Academy of Science, USA, Vol. 79, J. J. Hopfield, page 2554 (1982), and Proceedings of the National Academy of Science, USA, Vol. 81, J. J. Hopfield, page 3088 (1984), for a general description of this design.) Basically, such a network includes (1) a matrix having an interconnection element (e.g., a resistor with impedance between zero and infinite), at each intersection where (a) the interconnection element affects in a characteristic manner the signal transferred between the interconnected row and column and (b) at least one interconnection element allows the passage of at least 1.times.10.sup.-12 amp in each active row and at least one element allows the passage of such current in each active column and (2) active element(s) (e.g., amplifying devices that have gain greater than one) interacting with the matrix. The network is tailored to perform a desired processing function by appropriately choosing the impedance magnitude for each matrix intersection.
The data to be processed is introduced at input points. As the name parallel processing implies, all or a substantial portion of the data is introduced before processing is instituted. This process of introducing the information before processing is called initialization. To avoid errors the system should begin interaction with all this data essentially simultaneously. (In this context, simultaneous interaction means all the introduced data is present within a time equal to the settling time of the active element. Settling time is the larger of (1) the product of the output impedance of the active element multiplied by the capacitance of the output conductor and (2) the delay between a change in input to the active element and the completion of 90 percent of the corresponding change in the output.)
Schemes for initialization have been quite limited. Generally, it is proposed that the data in the form of an analog or digital signal be introduced at the inputs with the voltage--a voltage representing one component of the input vector--being introduced at each input point. Premature processing before all data is entered is prevented by employing high input signal power levels, e.g., levels above the product of (1) the square of the maximum output current of the associated amplifier times and (2) the effective resistance of the node of the matrix to which it is connected. This high power saturates the amplifiers and precludes the onset of processing. To initiate processing, all the input signals are terminated essentially simultaneously.
There is, however, a significant drawback with this saturation scheme. The high powers required to induce saturation produce a large thermal stress on the system. Since heat removal is generally an inefficient procedure, the number of input points and thus the amount of data that can be processed is correspondingly limited.
Initialization by switching off all interconnections has been reported (M. A. Sivilotti et al, Proceedings of the Conference of Neural Networks for Computing, J. S. Denker, ed., Snowbird, Utah, 1986, pp. 408-413). This requires a very large number of switches (N.sup.2) and is therefore not suitable for large circuits.